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authorDaniel Thompson <daniel@redfelineninja.org.uk>2020-06-11 20:13:58 (GMT)
committerDaniel Thompson <daniel@redfelineninja.org.uk>2020-06-11 20:15:47 (GMT)
commitacf318c122c635fef3dbe1f89806b5a4192500b6 (patch)
tree29de0ce45cdc99c170084e0bd6e930ed4af1b26a /wasp/boards/simulator/machine.py
parent61931c3637f382a696fb8af8a4f435272f383269 (diff)
wasp: simulator: Add interupt support for CST816S
Signed-off-by: Daniel Thompson <daniel@redfelineninja.org.uk>
Diffstat (limited to 'wasp/boards/simulator/machine.py')
-rw-r--r--wasp/boards/simulator/machine.py13
1 files changed, 13 insertions, 0 deletions
diff --git a/wasp/boards/simulator/machine.py b/wasp/boards/simulator/machine.py
index 1a5cf46..891b635 100644
--- a/wasp/boards/simulator/machine.py
+++ b/wasp/boards/simulator/machine.py
@@ -19,6 +19,7 @@ class ADC(Tracer):
class Pin(object):
IN = 'IN'
OUT = 'OUT'
+ IRQ_FALLING = 'IRQ_FALLING'
pins = {}
@@ -30,6 +31,9 @@ class Pin(object):
# Update the pin registry
self.pins[id] = self
+ def irq(self, trigger, handler):
+ self._handler = handler
+
def init(self, d, value):
self.value(value)
@@ -39,6 +43,9 @@ class Pin(object):
def off(self):
self.value(0)
+ def raise_irq(self):
+ self._handler(self)
+
def value(self, v=None):
if v is None:
if not self._quiet:
@@ -90,6 +97,12 @@ class I2C():
else:
raise OSError
+ def writeto_mem(self, addr, reg, dbuf):
+ if self.sim:
+ self.sim.writeto_mem(addr, reg, dbuf, Pin.pins)
+ else:
+ raise OSError
+
class Timer():
def __init__(self, id, period=1000000):
self.then = None