diff options
| author | Daniel Thompson <daniel@redfelineninja.org.uk> | 2020-03-07 11:50:26 (GMT) |
|---|---|---|
| committer | Daniel Thompson <daniel@redfelineninja.org.uk> | 2020-03-07 11:50:26 (GMT) |
| commit | 1ebafc083b3bcc1fd162834054a1b854201da2dc (patch) | |
| tree | 028757bdc27b46f6e7c7cf2f4cb7cc4c110db9f6 /wasp/boards/simulator/machine.py | |
| parent | 9664c394a63b2c1351957582465831d6c3b484d4 (diff) | |
wasp: simulator: Add CST816S simulation
Diffstat (limited to 'wasp/boards/simulator/machine.py')
| -rw-r--r-- | wasp/boards/simulator/machine.py | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/wasp/boards/simulator/machine.py b/wasp/boards/simulator/machine.py index d6d39b7..dd462bb 100644 --- a/wasp/boards/simulator/machine.py +++ b/wasp/boards/simulator/machine.py @@ -55,7 +55,7 @@ class SPI(object): def __init__(self, id): self._id = id if id == 0: - self.sim = display.ST7789Sim() + self.sim = display.spi_st7789_sim else: self.sim = None @@ -68,8 +68,22 @@ class SPI(object): else: print("Sending data: " + str(buf)) +class I2C(): + def __init__(self, id): + self.id = id + if id == 0: + self.sim = display.i2c_cst816s_sim + else: + self.sim = None + + def readfrom_mem_into(self, addr, reg, dbuf): + if self.sim: + self.sim.readfrom_mem_into(addr, reg, dbuf) + else: + raise OSError + def lightsleep(ms=10): - """TODO: This where we should manage the simulated components""" + display.tick() time.sleep(ms / 1000) def deepsleep(ms=10): |
